Field of the Invention
The invention lies in the semiconductor technology field and pertains, in particular, to memory cells. Memory cells are used in broad technological fields. The memory cells include not only read-only memories, referred to as ROMs, but also programmable memories, referred to as PROMs (programmable ROMs).
Memory cell configurations on semiconductor substrates are distinguished by the fact that they permit random access to the information stored in them. They contain a multiplicity of transistors. In the course of the reading operation, it is ascertained whether or not a current flows through a given transistor. A current flow through the transistor or blocking of the transistor are in this case assigned the logic states 1 or 0. The storage of the information is usually effected by using MOS transistors whose channel regions have a doping that corresponds to the desired blocking property.
German published patent application DE 195 10 042 A1 discloses a memory cell configuration with MOS transistors arranged in rows. In each row, the MOS transistors are connected in series. In order to increase the storage density, adjacent rows are in each case arranged alternately on the bottom of strip-type longitudinal trenches and between adjacent strip-type longitudinal trenches on the surface of the substrate. Source/drain regions which are connected to one another are constructed as a coherent doped region. That memory cell configuration can be read out by driving it row-by-row.
That memory cell configuration is distinguished by the fact that the area requirement which is necessary for the memory cells has been reduced from 4 F.sup.2 to 2 F.sup.2, where F is the minimum structure width of the photolithographic process used for the fabrication. However, it is disadvantageous that a further increase in the number of memory cells per unit area is not possible in this case.
U.S. Pat. No. 5,409,852 describes the arrangement of MOS transistors one above the other in order to increase the packing density. In order to make contact with transistors of this type, use is made of buried, doped layers which are correspondingly structured and are connected to metallic contacts.